Application Engineering, Sr Staff Engineer - Runset Development

We Are Synopsys is the leader in engineering solutions from silicon to systems, helping customers accelerate innovation in the era of pervasive intelligence. From AI and cloud infrastructure to automotive and mobile technologies, our solutions power the advanced chips and systems shaping the future. We combine industry-leading silicon design, IP, simulation, and analysis solutions with deep customer partnership to help innovators move faster and deliver with confidence.

You Are You are an experienced physical verification engineer who knows how to turn complex foundry requirements into verification flows design teams can trust. You have built and debugged DRC and LVS rule decks, solved difficult layout verification issues, and worked close to the realities of advanced semiconductor manufacturing.

You are comfortable working across foundry partners, customers, and engineering teams to close gaps, resolve ambiguity, and deliver production-ready solutions. You use Perl, Tcl, and Python to automate and scale verification work, and you bring the technical judgment to know what matters most when schedules are tight and silicon success is on the line.

If you are excited by advanced-node verification, high-impact technical work, and the chance to support technologies used across the global semiconductor ecosystem, this role will put you at the center of that work.

What You'll Be Doing * Develop and validate DRC, LVS, Fill, ERC, and DFM rule decks for advanced process nodes, including FinFET, GAA, and sub-3nm technologies * Partner with foundries such as TSMC, Samsung, Intel Foundry, and GlobalFoundries to translate manufacturing rules into automated verification flows * Debug complex layout verification failures, identify root causes, and deliver fixes that help prevent costly silicon respins * Build automation frameworks in Perl, Tcl, and Python to streamline rule deck development, regression testing, and deployment * Work across IC Validator, Calibre, and Pegasus platforms to optimize physical verification runsets for production environments * Support customers and design teams in resolving verification issues and improving manufacturability compliance * Drive improvements in verification methodology, runtime, and accuracy to help enable first-pass silicon success

The Impact You Will Have * Help customers bring advanced AI, automotive, cloud, and mobile chips to market with confidence * Deliver reliable, production-ready verification rule decks that support faster time-to-market * Improve verification efficiency and design quality for bleeding-edge semiconductor programs * Strengthen Synopsys partnerships with leading foundries through trusted technical execution * Influence the roadmap of Synopsys physical verification platforms through real-world feedback and use cases * Support the innovation driving next-generation semiconductor products worldwide

What You'll Need * Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Science, or a related technical field * 5+ years of hands-on experience in physical verification, DRC/LVS rule deck development, or semiconductor layout verification * Strong proficiency in Perl, Tcl, and Python for automation and verification flow development * Deep working knowledge of IC Validator, Calibre, or Pegasus physical verification platforms * Solid understanding of CMOS layout, ASIC design flows, and advanced semiconductor manufacturing processes * Experience collaborating with foundries or supporting advanced technology nodes such as 7nm, 5nm, 3nm, or below is a strong plus * Proven ability to debug complex verification failures and deliver production-ready solutions

Who You Are * You can translate complex foundry design rules into working, testable rule decks * You stay calm under pressure and know how to solve critical verification issues on demanding timelines * You are confident challenging ambiguity and working across teams to get to the right answer * You can explain technical tradeoffs clearly to engineers, customers, and stakeholders * You stay current on semiconductor technology trends and evolving verification requirements * You work effectively across global teams and time zones

Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to support your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will share more details about compensation and benefits during the hiring process.

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At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.