R&D Engineering, Scientist - 17200
Synopsys | |
$212000-$318000
| |
United States, California, Mountain View | |
700 East Middlefield Road (Show on map) | |
May 23, 2026 | |
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Date posted 05/21/2026
Category Engineering Hire Type Employee Job ID 17200 Base Salary Range $212000-$318000 Remote Eligible Yes Date Posted 05/21/2026
You Are: You are a recognized technical leader in high-speed memory interface design, with deep expertise spanning architecture, circuits, and system-level integration. You operate at a mastery level and are known for your ability to guide teams through complex technical challenges while influencing direction through credibility and trust rather than authority alone. You bring extensive experience in many of DDR, LPDDR, HBM, die-to-die and SerDes interfaces, with a strong foundation in signal integrity, power integrity, and high-speed I/O design. You are comfortable working from early pathfinding and architecture definition through to productization, and you understand how to translate market needs and customer requirements into scalable, high-performance PHY solutions. You are naturally seen as a leader-someone others turn to for direction, clarity, and confidence. You build trust quickly, elevate those around you, and create an environment where teams can execute with autonomy and accountability. Whether or not you have formal direct reports, your impact is measured by how teams align behind you and deliver. You thrive in a fast-paced,innovation-driven environment and are motivated by solving hard problems that push the boundaries of performance, speed, and efficiency. What You'll Be Doing:
The Impact You Will Have:
What You'll Need:
Who You Are:
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from AI systems to high-performance computing. We lead in chip design, verification, and IP integration, enabling the world's most advanced silicon solutions. The Team You'll Be A Part Of: You will be part of the IP Group (IPG), focused on defining and delivering industry-leading Memory PHY solutions, including DDR and HBM PHY architectures. The team owns the full lifecycle of PHY development - from early architecture and pathfinding to circuit innovation and product delivery. We closely engage with customers to understand their evolving needs and translate them into high-performance, scalable solutions. Our work involves continuous advancement in circuit techniques and interface speeds to stay ahead of industry demands. This is a highly technical, globally distributed team that values innovation, ownership, and strong leadership presence. Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #LI-AD5 At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S. | |
$212000-$318000
May 23, 2026