We use cookies. Find out more about it here. By continuing to browse this site you are agreeing to our use of cookies.
#alert
Back to search results
New

Staff Engineer, Hardware System & Silicon Validation

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Irvine
15485 Sand Canyon Avenue (Show on map)
Oct 07, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The engineer will be responsible for system hardware design, post-silicon bring-up, functional validation, and compliance testing. Their work supports high-density Ethernet switch applications in enterprise, wireless access point (AP), Power over Ethernet (PoE), and data center environments-covering advanced high-speed HSC retimer SERDES technologies.
Marvell's Post-Silicon Validation team develops test platforms for Alaska-C retimers and Alaska-M Copper PHYs, supporting functional, electrical, and system-level validation. The role also involves firmware testing, test plan development, and enabling customer platforms like Ethernet switches, Wi-Fi APs, and Gearbox retimers.
System Validation Engineers play a key role in ensuring Marvell's connectivity products meet rigorous standards for performance and reliability across enterprise, industrial, and cloud data center deployments.

What You Can Expect

  • Develop system-level and silicon-level validation plans for Marvell's Multi-Marketing Business Engineering, covering Alaska-C PAM4 SERDES high-speed line card HSC Retimer, Alaska-M Ethernet Multi-Gigabit copper PHYs, and PCIe Gen6 SSD Controller solutions.
  • Conduct post-silicon functional validation and IEEE compliance testing. Develop automated test setups using traffic generators, protocol analyzers, and oscilloscopes. Create detailed validation reports documenting setup, procedures, and results.
  • Develop high-speed hardware board platforms to support validation and characterization activities. Performed high-speed signal validation and analysis using advanced test equipment to measure eye diagrams, jitter, and bit error rate. Analyze and debug issues related to high-speed HSC retimer
  • Collaborate with cross-functional teams to identify and resolve system-level issues. Work closely with customers to address design challenges and debug failure cases. Perform RMA and FA to support product quality.

What We're Looking For

  • Bachelor's degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience. Master's degree in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.
  • Solid understanding of high-speed SERDES and Ethernet PHY products with experience in high-speed I/O testing, debugging, and validation testing.
  • Strong hands-on lab skills in system bring-up, testing, and issue resolution. Extensive knowledge of test equipment used for SERDES, AFE ADC/DCA characterization, including oscilloscopes, BERTs, and network analyzers
  • Familiarity with high-speed PCB layout, signal integrity, board assembly, and manufacturing.
  • Strong analytical, problem-solving, and communication skills.

Preferred:

  • Working knowledge of system validation and silicon characterization.
  • Extensive knowledge of the physical and protocol levels of high-speed Networking interfaces is an asset.
  • Working experience with Python.

Expected Base Pay Range (USD)

104,000 - 153,960, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-NF1
Applied = 0

(web-759df7d4f5-jhrq2)