Senior Distinguished Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

• Architectural Leadership: Lead the system architecture for advanced networking ASICs, focusing on performance, scalability, and power efficiency.
• Semiconductor Process Expertise: Apply deep knowledge of semiconductor processes to optimize power and performance scaling in ASIC designs.
• Multi-Die Systems: Design and implement multi-die systems and technologies, including die-to-die (D2D) interfaces, to enhance system integration and performance.
• High-Speed SerDes Integration: Collaborate with SerDes teams to integrate high-speed serial interfaces into switch architectures, ensuring signal integrity and reliability.
• Chiplet Architectures: Develop and promote chiplet-based design methodologies to enable modular and reusable IP blocks across multiple products.
• Advanced Packaging: Explore and implement advanced packaging solutions (2D, 2.5D, etc.) to meet the thermal and performance requirements of high-density ASICs.
• Cross-Functional Collaboration: Work closely with cross-functional teams, including hardware, software, and validation, to ensure cohesive product development and delivery.
• Mentorship: Mentor and guide junior engineers, fostering a culture of innovation and technical excellence within the organization

What We're Looking For

• Educational Background: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's or Ph.D. preferred.
• Experience: Minimum of 15 years in ASIC design and architecture, with a focus on networking applications.
• Technical Expertise:
  • Proven experience in system architecture for networking ASICs.
  • In-depth understanding of semiconductor processes and their impact on design.
  • Hands-on experience with multi-die systems and die-to-die communication protocols.
  • Expertise in high-speed SerDes design and integration.
  • Familiarity with chiplet architectures and their implementation.
  • Knowledge of advanced packaging techniques and their application in ASIC design.
• Soft Skills:
  • Strong leadership and communication skills.
  • Ability to work collaboratively in a cross-functional team environment.
  • Proven track record of mentoring and developing engineering talent.

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.