Field Programmable Gate Array (FPGA) Engineer - Open Rank (Mid Level)-ACL

The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech).Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem-solving research annually for government and industry.GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry.

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The Advanced Concepts Laboratory (ACL) of the Georgia Tech Research Institute (GTRI) seeks qualified individuals for the position of Field Programmable Gate Array (FPGA) Engineer. This position involves applying knowledge of programmable hardware to solve challenging problems utilizing the EM spectrum. This candidate will apply theory, modeling, and/or measurement skills to various applications, often focused on EM applications for national defense. The candidate will work in and sometimes lead an interdisciplinary team with computational electromagnetics modeling engineers, RF system engineers, mechanical engineers, and EM measurement specialists.

This position will be in the Electromagnetics Division, which develops wideband and adaptive RF systems that integrate apertures, electronics, and materials, augmented by a novel infrastructure for full electromagnetic characterization. This division is part of the Advanced Concepts Laboratory, which develops tailored solutions for a broad range of national security challenges through disciplined application of physics- and effects-based modeling to realizable systems, augmented with prototype development and testing. ACL's research thrusts extend across domains, and include bio-, chemical-, RF-, and optical-sensor physics; materials science and engineering; electromagnetic theory, computation, structures, and measurements; electronic warfare techniques and applications; operational scenario modeling and simulation; traditional and asymmetric threat analysis; and ground maneuver warfare.

The Field Programmable Gate Array (FPGA) Engineer supports the design, development, and implementation of complex firmware components in programmable hardware using the latest high-speed/high-density FPGAs and System-on-Chips (SoC) technologies. The FPGA Engineer is responsible for developing novel firmware algorithms into solutions that encompass high-speed digital logic design, real-time digital signal processing, custom interface development, system security, and other sponsor application areas. The FPGA Engineer is typically proficient in Hardware Description Languages (e.g. VHDL, Verilog) and/or High-Level Synthesis toolchains. The FPGA Engineer's responsibilities typically include requirements capture, trade-space analysis, design, simulation, deployment, verification, and documentation of programmable logic solutions.

• Perform firmware development using a Hardware Description Language (VHDL, Verilog)
• Author complex FPGA and/or SoC solutions that achieve unique capabilities
• Translate high-level functional or subsystem requirements into FPGA or SoC functionality
• Demonstrate mastery of technical standards, principles, theories, concepts and techniques.
• Manage FPGA projects across the full design cycle: design, simulation, synthesis, implementation, and verification
• Begin to take ownership of small team development, allocating tasking and/or mentoring others
• Provide significant contributions to technical reports, presentations, white papers, and competitive proposals

• BS in Electrical Engineering, Physics, or related discipline
• Relevant experience in programmable hardware that utilize electromagnetic theory (aperture design, antenna measurements, scattering measurements, communication systems design, EM material design and measurements, and related fields are all of interest)
• Keen written and oral skills in order to document and convey one's research to both internal and external customers on a regular basis
• Ability to obtain and maintain a DoD TS/SCI Security Clearance

• Active TS/SCI Clearance
• MS in Electrical Engineering
• Experience with prototype development for EM structures

<10% travel

This position vacancy is an open-rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section 3.2.1 of the Georgia Tech Faculty Handbook

• 5 years of related experience with a Bachelor's degree in Electrical engineering, Computer Engineering or related field of study
• 3 years of related experience with a Masters' degree in Electrical engineering, Computer Engineering or related field of study
• 0 years of related experience with a Ph.D. in Electrical engineering, Computer Engineering or related field of study

Please refer to our Research Faculty Technical Level Guidelines for minimum requirements at the higher levels.

Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens.

Candidates must be able to obtain and maintain an active security clearance.

Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link: https://benefits.hr.gatech.edu/.

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