New

Advanced Package Signal and Power Integrity Principal Engineer

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, Texas, Austin
13915 Burnet Road (Show on map)
May 02, 2025
About Marvell Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Marvell Advanced Packaging R&D team is responsible for package design and technology development to meet the electrical, mechanical, thermal and system requirements for the next generation high performance computing (HPC), Artificial Intelligence (AI) and networking solutions. The group focuses on signal integrity, power integrity, thermal integrity, mechanical integrity, processability, manufacturability, and reliability, involving high speed signaling and complex power delivery networks (PDNs) requiring innovative and custom solutions to meet constantly evolving customer needs. Many of the new designs require multi-chip, multiple component configurations involving, but not limited to, 2.5D and 3D packages, Co-packaged copper or optics and advanced substrates. Marvell has partnered with the world's leading manufacturers to solve our customer's most challenging designs and integrations with industry-leading packaging technologies. What You Can Expect Create new package technology concepts, perform routing feasibility, signal and power integrity studies for design optimization. Work with stakeholders to define and validate advanced design rule roadmap for interposer, substrates and packages. Explore technologies beyond what is currently available, make recommendations, and create and protect IP to maximize performance. Explore technology feasibility and create proof-of-concept samples. What We're Looking For Deep knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies. Experience in signal and power integrity simulations, analysis and optimization for 2.5D and 3D packages including interface with memory, interposer, substrates and PCBs. Ability to determine optimal signal routing, power delivery verification and package size determination Experience interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design. Bachelor's degree in electrical engineering or related fields and 15+ years of related professional experience in signal and power integrity, or master's degree and 12+ years of related professional experience, or PhD degree with 8+ years of experience Skills needed to be successful in this role: Deep understanding of fundamental concepts of signal and power integrity, transmission line and electromigration, and the ability to apply those concepts to create new design rules and explore new package technologies. Mastery in tools and workflows: signal and power integrity analyses using Cadence Sigrity PowerSI and Ansys SIwave; EM sims using Ansys HFSS, SI-Wave, Cadence Clarity, and the ability to correlate that with real world challenges. Good understanding of interposer, substrate, package, PCB level design rules, ability to perform routing feasibility studies using Cadence APD or PCB editor. Understanding of signal and power integrity for 2.5D/3D packages including (a) CoWoS-S/R/L, (b) EMIB, (c) CPO, (d) CPC Ability to manage programs involving cross-functional teams. Strong interpersonal skills and willingness to learn new things are necessary along with the ability to work with stakeholders in multiple time zones across the globe. Ability to influence vendors to align their roadmap with company goals. Strong communication, presentation and documentation skills The ideal candidate would have: Experience with VNA and TDR measurements for package and PCB characterization Experience in advanced package and substrate technologies with understanding of process and materials, component and board level reliability, warpage and thermal management. Board and system level signal and power integrity analysis Experience with programming languages: Python, Perl, Skill, C++ Expected Base Pay Range (USD) 148,500 - 219,780, $ per annum The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com. #LI-MM1